`include "c3d_timescale.v"
`include "c3d_defines.v"

module c3d_alu_test;

localparam width = `C3D_OPERAND_WIDTH;

reg [width-1:0]             num_a;
reg [width-1:0]             num_b;
reg [`C3D_ALUOP_WIDTH-1:0]  op;
wire [width-1:0]            result;

c3d_alu alu(
    .a(num_a), .b(num_b), .alu_op(op), .comp_op(4'b0),
    .mult_mac_result(32'd0), .result(result), .flag(1'b0)
);

initial begin
    //$dumpfile("testwave.vcd");
    //$dumpvars(0, c3d_alu_test);
end

initial begin
    num_a <= 32'd53; num_b <= 32'd12; op <= `C3D_ALUOP_ADD;
    #10
    $display("%d + %d = %d", num_a, num_b, result);

    num_a <= 32'd109; num_b <= 32'd23; op <= `C3D_ALUOP_SUB;
    #10
    $display("%d - %d = %d", num_a, num_b, result);

    num_a <= 32'h12; num_b <= 32'h23; op <= `C3D_ALUOP_XOR;
    #10
    $display("%x ^ %x = %x", num_a, num_b, result);

    num_a <= 32'h10; num_b <= 32'h52; op <= `C3D_ALUOP_OR;
    #10
    $display("%x | %x = %x", num_a, num_b, result);

    num_a <= 32'h22; num_b <= 32'h98; op <= `C3D_ALUOP_AND;
    #10
    $display("%x & %x = %x", num_a, num_b, result);

    num_b <= 32'd124; op <= `C3D_ALUOP_IMM;
    #10
    $display("%d = %d", num_b, result);

    $finish;
end

endmodule